hn-classics/_stories/1996/10612358.md

created_at	title	url	author	points	story_text	comment_text	num_comments	story_id	story_title	story_url	parent_id	created_at_i	_tags	objectID	year
2015-11-23T01:32:05.000Z	Caltech Potato Chips (1996)	http://www.async.caltech.edu/~mika/potato/potato.html	ch	46			18					1448242325	story author_ch story_10612358	10612358	1996

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Potato Chips

Caltech Potato Chips

Have you ever seen a RISC processor run off the power of a potato before? I bet you haven't! This is the story of the world's possibly first and only vegetable-powered RISC processor.

The Caltech Asynchronous Microprocessor was designed by the Asynchronous VLSI group in 1988 and 1989 and manufactured through MOSIS in 2.0 micron (and later 1.6 micron) two-level-metal CMOS, a state-of-the art technology in the mid-to-late eighties. (By comparison, today's (January 1996) state-of-the art technologies have feature sizes of about 0.25 microns. Consequently, modern CMOS circuits are about fifty times denser, run twenty times faster, and consume considerably less power than their 1980's predecessors.)

(Continued...)

By Mika Nystr&oumlm;, mika@vlsi.cs.caltech.edu January 16, 1996.