129 lines
3.6 KiB
Plaintext
129 lines
3.6 KiB
Plaintext
// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: projects/02/ALU.hdl
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/**
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* The ALU (Arithmetic Logic Unit).
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* Computes one of the following functions:
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* x+y, x-y, y-x, 0, 1, -1, x, y, -x, -y, !x, !y,
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* x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs,
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* according to 6 input bits denoted zx,nx,zy,ny,f,no.
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* In addition, the ALU computes two 1-bit outputs:
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* if the ALU output == 0, zr is set to 1; otherwise zr is set to 0;
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* if the ALU output < 0, ng is set to 1; otherwise ng is set to 0.
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*/
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// Implementation: the ALU logic manipulates the x and y inputs
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// and operates on the resulting values, as follows:
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// if (zx == 1) set x = 0 // 16-bit constant
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// if (nx == 1) set x = !x // bitwise not
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// if (zy == 1) set y = 0 // 16-bit constant
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// if (ny == 1) set y = !y // bitwise not
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// if (f == 1) set out = x + y // integer 2's complement addition
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// if (f == 0) set out = x & y // bitwise and
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// if (no == 1) set out = !out // bitwise not
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// if (out == 0) set zr = 1
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// if (out < 0) set ng = 1
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CHIP ALU {
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IN
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x[16], y[16], // 16-bit inputs
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zx, // zero the x input?
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nx, // negate the x input?
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zy, // zero the y input?
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ny, // negate the y input?
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f, // compute out = x + y (if 1) or x & y (if 0)
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no; // negate the out output?
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OUT
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out[16], // 16-bit output
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zr, // 1 if (out == 0), 0 otherwise
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ng; // 1 if (out < 0), 0 otherwise
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PARTS:
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// if (zx == 1) set x1 = 0
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Mux16(a=x, b=false, sel=zx, out=x1);
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// set x2 = !x1
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Not16(in=x1, out=x2);
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// if (nx == 1), set x3=x2
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Mux16(a=x1, b=x2, sel=nx, out=x3);
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// if (zy == 1) set y1 = 0
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Mux16(a=y, b=false, sel=zy, out=y1);
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// set y2 = !y1
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Not16(in=y1, out=y2);
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// if (ny == 1), set y3=y2
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Mux16(a=y1, b=y2, sel=ny, out=y3);
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// set addition = x3 + y3 (integer 2's complement addition)
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Add16(a=x3, b=y3, out=addition);
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// set andresult = x & y (bitwise and)
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And16(a=x3, b=y3, out=andresult);
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// maybeout == andresult|addition, depending on f(0|1)
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Mux16(a=andresult, b=addition, sel=f, out=maybeout);
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// flippedout = !maybeout
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Not16(in=maybeout, out=flippedout);
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// out = (flippedout|maybeout) depending on no=0|1
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Mux16(a=maybeout, b=flippedout, sel=no, out=out,
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out[0]=outcopy0,
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out[1]=outcopy1,
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out[2]=outcopy2,
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out[3]=outcopy3,
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out[4]=outcopy4,
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out[5]=outcopy5,
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out[6]=outcopy6,
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out[7]=outcopy7,
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out[8]=outcopy8,
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out[9]=outcopy9,
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out[10]=outcopy10,
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out[11]=outcopy11,
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out[12]=outcopy12,
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out[13]=outcopy13,
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out[14]=outcopy14,
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out[15]=outcopy15
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);
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// Split Out in 2 halves, do a bitwise OR on each to
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// see if ANY bit in either half is set to 1
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// outlow = 1 if any of out[0..7] is 1
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Or8Way(in[0]=outcopy0,
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in[1]=outcopy1,
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in[2]=outcopy2,
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in[3]=outcopy3,
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in[4]=outcopy4,
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in[5]=outcopy5,
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in[6]=outcopy6,
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in[7]=outcopy7,
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out=outlow);
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// outhigh = 1 if any of out[8..15] is 1
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Or8Way(in[0]=outcopy8,
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in[1]=outcopy9,
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in[2]=outcopy10,
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in[3]=outcopy11,
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in[4]=outcopy12,
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in[5]=outcopy13,
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in[6]=outcopy14,
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in[7]=outcopy15,
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out=outhigh);
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// if either outlow or outhigh =1 , onz = 1
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Or(a=outlow, b=outhigh, out=onz);
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// negate onz to get zr
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Not(in=onz, out=zr);
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Or(a=outcopy15, b=false, out=ng);
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}
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