Adds Or/Not16 bit variants. Adds COST for each chip
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@ -9,6 +9,8 @@
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* 0 otherwise
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*/
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// COST = 2 NAND Gates
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CHIP And {
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IN a, b;
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OUT out;
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@ -8,6 +8,8 @@
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* for i = 0..15: out[i] = (a[i] and b[i])
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*/
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// Cost = 32 NAND Gates
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CHIP And16 {
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IN a[16], b[16];
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OUT out[16];
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@ -9,6 +9,8 @@
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* {0, in} if sel == 1
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*/
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// COST = 5 NAND Gates
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CHIP DMux {
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IN in, sel;
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OUT a, b;
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@ -9,6 +9,8 @@
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* b otherwise
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*/
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// COST = 8 NAND Gates
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CHIP Mux {
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IN a, b, sel;
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OUT out;
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@ -8,6 +8,8 @@
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* out = not in
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*/
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// COST = 1 NAND Gate
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CHIP Not {
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IN in;
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OUT out;
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@ -8,6 +8,8 @@
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* for i=0..15: out[i] = not in[i]
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*/
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// COST = 16 NAND Gates
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CHIP Not16 {
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IN in[16];
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OUT out[16];
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@ -11,6 +11,8 @@
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// Or/Xor: These functions can be defined in terms of some of the Boolean functions implemented previously, using some simple Boolean manipulations. Thus, the respective gates can be built using previously built gates.
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// COST = 3 NAND gates
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CHIP Or {
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IN a, b;
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OUT out;
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@ -18,6 +20,5 @@ CHIP Or {
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PARTS:
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Not(in=a, out=na);
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Not(in=b, out=nb);
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And(a=na, b=nb, out=nout);
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Not(in=nout, out=out);
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Nand(a=na, b=nb, out=out);
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}
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@ -10,10 +10,64 @@
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// Or/Xor: These functions can be defined in terms of some of the Boolean functions implemented previously, using some simple Boolean manipulations. Thus, the respective gates can be built using previously built gates.
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// COST= 48 NAND Gates
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CHIP Or16 {
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IN a[16], b[16];
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OUT out[16];
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PARTS:
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Nand(a=a[0], b=a[0], out=na0);
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Nand(a=a[1], b=a[1], out=na1);
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Nand(a=a[2], b=a[2], out=na2);
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Nand(a=a[3], b=a[3], out=na3);
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Nand(a=a[4], b=a[4], out=na4);
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Nand(a=a[5], b=a[5], out=na5);
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Nand(a=a[6], b=a[6], out=na6);
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Nand(a=a[7], b=a[7], out=na7);
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Nand(a=a[8], b=a[8], out=na8);
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Nand(a=a[9], b=a[9], out=na9);
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Nand(a=a[10], b=a[10], out=na10);
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Nand(a=a[11], b=a[11], out=na11);
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Nand(a=a[12], b=a[12], out=na12);
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Nand(a=a[13], b=a[13], out=na13);
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Nand(a=a[14], b=a[14], out=na14);
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Nand(a=a[15], b=a[15], out=na15);
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Nand(a=b[0], b=b[0], out=nb0);
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Nand(a=b[1], b=b[1], out=nb1);
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Nand(a=b[2], b=b[2], out=nb2);
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Nand(a=b[3], b=b[3], out=nb3);
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Nand(a=b[4], b=b[4], out=nb4);
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Nand(a=b[5], b=b[5], out=nb5);
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Nand(a=b[6], b=b[6], out=nb6);
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Nand(a=b[7], b=b[7], out=nb7);
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Nand(a=b[8], b=b[8], out=nb8);
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Nand(a=b[9], b=b[9], out=nb9);
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Nand(a=b[10], b=b[10], out=nb10);
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Nand(a=b[11], b=b[11], out=nb11);
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Nand(a=b[12], b=b[12], out=nb12);
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Nand(a=b[13], b=b[13], out=nb13);
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Nand(a=b[14], b=b[14], out=nb14);
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Nand(a=b[15], b=b[15], out=nb15);
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Nand(a=na0, b=nb0, out=out[0]);
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Nand(a=na1, b=nb1, out=out[1]);
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Nand(a=na2, b=nb2, out=out[2]);
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Nand(a=na3, b=nb3, out=out[3]);
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Nand(a=na4, b=nb4, out=out[4]);
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Nand(a=na5, b=nb5, out=out[5]);
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Nand(a=na6, b=nb6, out=out[6]);
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Nand(a=na7, b=nb7, out=out[7]);
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Nand(a=na8, b=nb8, out=out[8]);
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Nand(a=na9, b=nb9, out=out[9]);
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Nand(a=na10, b=nb10, out=out[10]);
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Nand(a=na11, b=nb11, out=out[11]);
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Nand(a=na12, b=nb12, out=out[12]);
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Nand(a=na13, b=nb13, out=out[13]);
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Nand(a=na14, b=nb14, out=out[14]);
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Nand(a=na15, b=nb15, out=out[15]);
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}
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@ -0,0 +1,7 @@
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| a | b | out |
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| 0000000000000000 | 0000000000000000 | 0000000000000000 |
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| 0000000000000000 | 1111111111111111 | 1111111111111111 |
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| 1111111111111111 | 1111111111111111 | 1111111111111111 |
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| 1010101010101010 | 0101010101010101 | 1111111111111111 |
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| 0011110011000011 | 0000111111110000 | 0011111111110011 |
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| 0001001000110100 | 1001100001110110 | 1001101001110110 |
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@ -7,6 +7,8 @@
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* Exclusive-or gate:
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* out = not (a == b)
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*/
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// Cost = 6 NAND Gates
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// TODO: Improve this
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CHIP Xor {
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IN a, b;
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