2020-05-20 14:01:35 +00:00
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// This file is part of the materials accompanying the book
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// "The Elements of Computing Systems" by Nisan and Schocken,
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2020-05-19 12:42:52 +00:00
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// MIT Press. Book site: www.idc.ac.il/tecs
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// File name: projects/03/b/RAM512.hdl
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/**
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* Memory of 512 registers, each 16 bit-wide. Out holds the value
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2020-05-20 14:01:35 +00:00
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* stored at the memory location specified by address. If load==1, then
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* the in value is loaded into the memory location specified by address
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2020-05-19 12:42:52 +00:00
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* (the loaded value will be emitted to out from the next time step onward).
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*/
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CHIP RAM512 {
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IN in[16], load, address[9];
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OUT out[16];
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PARTS:
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2020-05-20 14:01:35 +00:00
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// To flip things here, let's use the
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// LSB to address the RAM64 modules
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DMux8Way(in=load, sel=address[0..2],
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a=load1,
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b=load2,
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c=load3,
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d=load4,
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e=load5,
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f=load6,
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g=load7,
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h=load8);
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// We use the MSB to index inside the RAM64s
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RAM64(in=in, load=load1, address=address[3..8], out=out1);
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RAM64(in=in, load=load2, address=address[3..8], out=out2);
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RAM64(in=in, load=load3, address=address[3..8], out=out3);
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RAM64(in=in, load=load4, address=address[3..8], out=out4);
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RAM64(in=in, load=load5, address=address[3..8], out=out5);
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RAM64(in=in, load=load6, address=address[3..8], out=out6);
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RAM64(in=in, load=load7, address=address[3..8], out=out7);
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RAM64(in=in, load=load8, address=address[3..8], out=out8);
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// Now we use the LSB again to pick the correct RAM output
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Mux8Way16(
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a=out1,
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b=out2,
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c=out3,
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d=out4,
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e=out5,
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f=out6,
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g=out7,
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h=out8,
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sel=address[0..2], out=out);
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}
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